saronix voltage controlled crystal oscillator technical data saronix 3.3 & 5v, hcmos 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 ds-162 rev d 5.2.1 s1310 / s1510 series frequency range: actual size description a voltage controlled crystal oscillator with a wide range of performance op- tions available up to 125 mhz. this economic part is designed for phase- locked loop circuits commonly encoun- tered in telecom, lan and wireless data, and in video processing applications. the hcmos output can drive both high speed cmos and ttl loads. the de- vices are packaged in either standard 14- pin or 8-pin dip compatible all metal, resistance welded packages for com- mercial or industrial temperature range applications. 32 mhz to 125 mhz frequency stability: 25 or 50 ppm over all conditions: operating temperature, voltage change, load change, calibration tolerance, with v c = 2.5v @ 5v, vc = 1.65v @ 3.3v output waveform applications & features ? ? ? wide frequency range up to 125 mhz hcmos compatible full and half size standard dip pack- ages tri-state version available, see part numbering guide for options cmos t r t f v dd gnd 0 level 20% v dd 50% v dd 80% v dd 1 level symmetry temperature range: operating: storage: 0 to +70c, -40 to +85c -55 to +125c supply voltage: recommended operating: 5 v 5% or 3.3v 10% supply current: 32 to 70 mhz: 70+ to 125 mhz: 50ma max, 35ma max @ 3.3v 65ma max, 35ma max @ 3.3v output drive: symmetry: rise & fall times: logic 0: logic 1: load: jitter: 3.3v: 45/55% max @ 50% v dd for 0 to 70c, 3.3v: 40/60% max @ 50% v dd for -40 to +85c 5.0v: 45/55% max @ 50% v dd or 40/60% max @ 1.4v ttl level 4ns max: 20% to 80% v dd 1.5ns max: 0.5v to 2.5v @ 5v ttl only 0.5v max @ 5v or 20% v dd max @ 3.3v 2.5v min @ 5v or 80% v dd min @ 3.3v 5v: 5ttl or 50pf, 32 to 50 mhz 5v: 5ttl or 30pf 50+ to 125 mhz 3.3v: 30pf up to 80 mhz, 95 ? ac up to 125 mhz 20ps max rms period jitter mil-std-883, method 2002, condition b mil-std-883, method 2003 mil-std-202, method 211, conditions a and c mil-std-883, method 2007, condition a mil-std-202, method 215 mil-std-202, method 210, condition a, b or c mechanical: shock: solderability: terminal strength: vibration: solvent resistance: resistance to soldering heat: environmental: mil-std-883, method 1014, condition c mil-std-883, method 1014, condition a2 mil-std-883, method 1011, condition a mil-std-883, method 1004 gross leak test: fine leak test: thermal shock: moisture resistance: pull characteristics: input impedance: frequency response (-3db): pullability: control voltage: transfer function: linearity: center control voltage: 50k ? min 50 khz min 25, 50, 75, 100 ppm apr* 0.5 to 4.5 v @ 5v or 0.3 to 3.0v @ 3.3v frequency increases when control voltage increases 5% or 10% max 2.5v @ 5v, 1.65v @ 3.3v * apr = (vcxo pull relative to specified output frequency) ? (vcxo frequency stability) aging: @ 40c: 10 ppm max for 5 years or 12 ppm max for 10 years
saronix s1310 / s1510 series saronix voltage controlled crystal oscillator technical data 3.3 & 5v, hcmos 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 ds-162 rev d 5.2.2 all specifications are subject to change without notice. mm inches package details part numbering guide 5.08 .200 max .46.08 .018.003 0.91 .036 max 7.62.20 .300.008 120 120 120 7.62.20 .300.008 1.5 .059 pin 5 output pin 8 v dd pin 1 control voltage pin 4 gnd case (v ss ) scale: none (dimensions in ) saronix denotes pin 1 pin 3 input logic 1 or nc logic 0 or gnd pin 8 output oscillation high impedance required input levels on pin 3: logic 1 = 3.0 v min logic 0 = 0.3v max s t 151 0 a a b j - 60.0000 saronix frequency (mhz) t = tri-state optional: full size 3.3 or 5v standard: 1/2 size 5v not available: 1/2 size 3.3v blank = non tri-state linearity a = 5% b = 10% power supply half size package saronix vcxo denotes pin 1 12.2.13 .480.005 pin 3 pin 1 pin 7 4.57.13 .18.005 7.62.13 .300.005 pin 12 pin 14 15.24.13 .600.005 5.08 .200 max 4.85.25 .191.01 3.94.25 .155.010 .46.05 .018.002 full size package control voltage c l = 30pf or 50pf (note a) gnd oscillator v dd out pin 7 (4) pin 14 (8) pin 8 (5) pin 1 (1) * ma m v m control voltage note a: cl includes probe and fixture capacitance * ( ) indicates pin numbers for half size package figure 2 ? ttl load test circuit pin 14 (8) pin 8 (5) pin 1 (1) * pin 7 (4) oscillator gnd n/c out v dd v m ma m power supply c l = 15pf (note a) mmdb7000 or equiv r l = 780 ? pullability (minimum apr) a = 50 ppm b = 100 ppm g = 25 ppm h = 75 ppm test point test point a = 25 ppm, 0 to 70 c b = 50 ppm, 0 to 70 c e = 50 ppm, -40 to +85 c stability tolerance series 131 = 3.3v, hcmos/ttl vcxo 151 = 5v, hcmos/ttl vcxo model 0 = full size package 9 = half size package note a: c l includes probe and fixture capacitance (50pf max 32 to 50 mhz, 30pf max 50+ to 125 mhz) * ( ) indicates pin numbers for half size package figure 1 ? 30pf or 50pf load test circuit 21.0 .825 max 0.91 .036 13.0 .510 max tri-state logic table test circuits (4) glass insulators pin 8 pin function: pin 8: output pin 12: n/c (tri-state version only) pin 14: vdc (v dd ) pin 1: control voltage pin 3: tri-state control (tri-state version only) pin 7: gnd / case (v ss ) standard marking format includes date code, frequency & model 13.0 .510 max 10.87 .428 max 6.86 .270 13.0 .510 max 6.0 .236 1.5 .059 standard marking format includes date code, frequency & model lead style blank = thru-hole j = gull wing
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